Semiconductor device and method of manufacturing such a semiconductor device

Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung

Dispositif semiconducteur et procédé de fabrication d'un tel dispositif semiconducteur


The invention relates to an integrated circuit having an interconnection pattern which is recessed in the insulating layer, for example, an oxide layer. A groove is etched in the insulating layer corresponding to the metal pattern by means of a mask which is the inverted image of the interconnection pattern during manufacture. Etching is continued until contact windows are fully opened. To prevent the oxide between the contact windows also being removed, an etching stopper layer is provided in the oxide layer. A layer already present in the process may be used for this etching stopper layer, for example, a polycrystalline silicon layer, so that extra process steps are made redundant.




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Patent Citations (3)

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    EP-0224013-A2June 03, 1987International Business Machines CorporationProcédé pour la fabrication de couches coplanaires métal-isolant multicouches sur un substrat
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NO-Patent Citations (0)


Cited By (9)

    Publication numberPublication dateAssigneeTitle
    EP-0625800-A1November 23, 1994Philips Electronics N.V.Dispositif capteur d'images à couplage de charges
    EP-0757380-A2February 05, 1997Eastman Kodak CompanyMethod of making a planar charged coupled device with edge aligned implants and electrodes connected with overlaying metal
    EP-0757380-A3December 29, 1997Eastman Kodak CompanyVerfahren zur Herstellung einer planaren ladungsgekoppelten Anordnung mit seitlich ausgerichteten Implantierungen und durch deckenden metallverbundenen Elektroden
    EP-0766303-A2April 02, 1997Kabushiki Kaisha ToshibaDispositif semi-conducteur ayant une gorge de connexion et un trou de contact formés de façon auto-alignée et son procédé de fabrication
    EP-0766303-A3April 23, 1997Toshiba Kk
    US-5449931-ASeptember 12, 1995U.S. Philips CorporationCharge coupled imaging device having multilayer gate electrode wiring
    US-5652173-AJuly 29, 1997Philips Electronics North America CorporationMonolithic microwave circuit with thick conductors
    US-5976972-ANovember 02, 1999Kabushiki Kaisha ToshibaMethod of making semiconductor apparatus having wiring groove and contact hole formed in a self-alignment manner
    US-6163067-ADecember 19, 2000Kabushiki Kaisha ToshibaSemiconductor apparatus having wiring groove and contact hole in self-alignment manner